1. Field of the Invention
The present invention relates to a liquid crystal display (LCD), and particularly to an active matrix substrate having an electronic static discharge (ESD) protection circuit.
2. Description of Related Art
During a manufacturing process of an LCD, such as film deposition or dry etching in array process, alignment film rubbing in cell process, or the electric test on a substrate when the process ended, could inevitably lead to accumulation of static charges on the substrate. In details, the plasma used in the process of film deposition or dry etching may cause accumulation of static charges; rubbing during the alignment film fabrication process may cause accumulation of static charges; and electrical test on the substrate may also cause residue of charges. Because the material of the substrate is insulating transparent glass, the accumulated static charges on the substrate generated during the manufacturing process can not be easily conducted out of the substrate. When accumulated to a certain degree, the static charges may discharge at the substrate, and the static discharge may cause serious damage to the active matrix substrate.
Therefore, many methods for avoiding an active matrix substrate from being damaged by static discharge are developed accordingly. A conventional method is to design an ESD protection circuit for protecting the internal circuits of the active matrix substrate.
FIG. 1 is a schematic diagram for illustrating a conventional active matrix substrate 100. FIG. 2 is a partial enlarged diagram of FIG. 1. Referring to FIGS. 1 and 2, on a substrate 110, a plurality of pixel units 120 arranged on an active area 112 in an array, a static releasing conductive line 130 and an ESD protection circuit 140 on a peripheral area 114 adjacent to the active area 112 are disposed. The ESD protection circuit 140 includes an outer short ring (OSR) 142, an inner short ring (ISR) 144 and a high-resistance consumption resistor 146 formed by a sinuous circuit. In details, the OSR 142 and ISR 144 are respectively composed of a plurality of parallel diodes, thin film transistors (TFT), capacitively coupled field effect transistors (CCFET) or a combination thereof. The OSR 142 and the high-resistance consumption resistor 146 are connected in series for forming an ESD protection circuit 140. Therefore, when static discharge occurs at the active matrix substrate 100, the ESD protection circuit 140 can protect the internal active device from being damaged.
Generally, in a manufacturing process of an active matrix substrate 100, a first metal layer of an active device and a scan line are formed by a first photolithography/etch process, a channel layer is formed by a second photolithography/etch process, a second metal layer of an active device and a data line are formed by a third photolithography/etch process, a through hole is formed by a fourth photolithography/etch process, and a pixel electrode is formed by a fifth photolithography/etch process. When the pixel electrode is formed by a fifth photolithography/etch process, the high-resistance consumption resistor 146 of the conventional ESD protection circuit 140 is fabricated simultaneously. Specifically, the high-resistance consumption resistor 146 including a sinuous trace with high resistance formed on a first cutting area 114a of the substrate 110, and the material of the trace is same as the material of the pixel electrode, such as indium tin oxide (ITO) indium zinc oxide (IZO) and so on. However, a time gap exists between forming the data line of the active matrix substrate 100 and forming the high-resistance consumption resistor 146, during which the ESD protection circuit 140 is not yet formed and can not protect the active matrix substrate 100. But the abnormal static discharge may occur to damage the active device of the active matrix substrate 100 after forming data line.
Referring to FIG. 2, a conventional ESD protection circuit 140 is usually disposed in a peripheral area 114. However, according to the process of the active matrix substrate 100, a plurality of cutting and edge grinding steps must be performed on the substrate 110 before the subsequent module assembly process. When the substrate 110 is cut at the second time, the high-resistance consumption resistor 146 located at the first cutting area 114a and a part of the ESD protection circuit 140 are cut away, therefore the ESD protection circuit can no longer protect the active matrix substrate 100. Unfortunately, static discharge may still occur during the following steps such as polarizer attachment, autoclave with pressuring or rework, therefore the active matrix substrate 100 without the protection of the ESD protection circuit 140 is still relatively vulnerable to the static discharge.
FIG. 3 is a schematic diagram of a conventional active matrix substrate being damaged due to static discharge. Referring to FIG. 3, when an ESD occurs at “A” in an active matrix substrate 100, an OSR 142 of an ESD protection circuit 140 provides a first protection, and an ISR 144 of the ESD protection circuit 140 provides a second protection. Because the conventional ESD protection circuit 140 can not provide complete protection, the internal circuits of the active matrix substrate 100 such the data line at “D” are relatively vulnerable and therefore the display quality is affected accordingly.